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Ultra-Compact Wearable Design
Wearable devices such as smartwatches, fitness trackers, and hearables offer extremely limited board space and battery capacity. Using separate memory and storage packages consumes precious PCB area and complicates routing, making it difficult to achieve slimmer, lighter product designs.
ADATA ePOP stacks eMMC storage and LPDDR memory in a single package, significantly reducing PCB footprint. For discrete solutions, ADATA also offers eMMC in a compact 7.2 x 7.2 x 0.8 mm package, enabling smaller and thinner wearable designs without compromising reliability.
Integrated Package for Compact Integration
ADATA ePOP integrates high-speed storage and LPDDR4X memory in one package, supporting HS400 mode and 4266 Mbps memory speeds to maximize PCB space.
Small Package for Slim Wearables
Features an ultra-thin 0.8mm profile in 16GB / 32GB capacities, perfect for space-constrained wearable and accessory designs.
Performance and Battery Life for Portable Devices
Portable smart devices are adding richer applications and on-device AI features, demanding faster storage and higher memory bandwidth, yet every watt consumed directly shortens battery life, and thermal headroom is tightly constrained in compact enclosures.
ADATA pairs UFS 3.1 high-speed embedded storage with low-power LPDDR5X memory at up to 8533 MT/s, delivering fast boot, smooth app performance, and on-device AI capability while optimizing power consumption for longer battery life.
High-Speed AI-Ready Embedded Storage
UFS 3.1 embedded storage offers capacities up to 512GB and an HS-Gear4 interface, enabling fast boot times, quick app loading, and smooth AI model access.
Low-Power AI Bandwidth Optimization
LPDDR5X provides low-power, high-bandwidth DRAM at up to 8533 MT/s that powers on-device AI processing while extending battery life in portable designs.
ePOP (eMMC + LPDDR)
- EPOP51C-032G32ATE: Integrated ePOP solution for slim, power-efficient wearables
- HS400 mode with 4266 Mbps memory speed, 32GB + 32GB configuration
- Compact 8x9.5x0.8mm package; Package-on-package design integrating storage and memory in one footprint, minimizing PCB area for wearable devices
eMMC 5.1 Small Package
- AEM516PE8S-0CMR / AEM532PE8S-0CMR: Compact eMMC storage for space-constrained devices
- HS400 mode, 16GB / 32GB Half-TLC solution
- Compact 7.2x7.2x0.8mm package, -25°C~85°C operating temperature, ideal for slim, space-constrained designs
LPDDR5X Memory
- L5CG32D2023MCAS / L5CG32D4023MCAS: High-speed LPDDR5X memory with low-power performance
- Up to 8533 MT/s with 32Gb / 64Gb densities
- 315-ball package (12.4x15x1.1mm), low-power design for battery-powered portable and wearable devices
UFS 3.1 Embedded Storage
- AEU312TCAS-3GMR / AEU325TCAS-3GMR / AEU351TCAS-3GMR: UFS 3.1 storage for fast, AI-ready performance
- HS-Gear4 interface with 128GB/256GB/512GB capacities
- High-speed embedded storage engineered for fast boot, quick app loading, and smooth on-device AI model access in portable devices
ePOP Package-on-Package Integration
ePOP (embedded Package on Package) technology integrates the controller, NAND, and LPDDR memory into a single package, significantly reducing board area and simplifying PCB routing compared to discrete components. Combined with HS400 mode and memory speeds of up to 4266 Mbps, ePOP meets the performance requirements of wearable applications while freeing up space for larger battery capacity or slimmer product designs.
Low-Power Design for Extended Battery Life
ADATA embedded solutions are engineered for battery-powered devices: LPDDR5X delivers up to 8533 MT/s bandwidth with low-power operation, while compact, thin packages such as 0.8mm-profile eMMC reduce both footprint and thermal load. Combined with industrial-grade reliability and long-term supply stability, these solutions help portable and wearable products run longer between charges across long product life cycles.
ePOP stacks the memory package directly on top of the application processor, connecting through the FBGA 144-ball interface instead of separate DRAM and Flash footprints on the PCB. The eMMC 5.1 side handles storage in HS400 mode (up to 190 MB/s read, 115 MB/s write) while the LPDDR4X die serves as system memory — the host sees two standard interfaces, so no special software support is required.
The package measures only 8.0 x 9.5 x 0.8mm and sits above the processor rather than beside it, so it consumes essentially no additional board area. Compared with placing a discrete eMMC and a discrete LPDDR4X device side by side, this removes two footprints and their fan-out routing, freeing space for battery, RF or sensor components.
Check four things: the storage and DRAM combination your platform needs (this model pairs 32GB 3D TLC NAND with 32GB LPDDR4X), package and ball-out compatibility with your processor (FBGA 144 Ball, 8.0 x 9.5 x 0.8mm), voltage rails (VCC 3.3V with VCCQ selectable at 1.8V or 3.3V), and the temperature range your product must meet (-25°C to 85°C operating, -40°C to 85°C non-operating).
The eMMC controller applies LDPC ECC to correct bit errors, Bad Block Management to retire failing blocks, and Garbage Collection plus TRIM to maintain stable write performance and endurance throughout the product life. Combined with its compact size and operating temperature range, this makes ePOP suitable for wearable devices such as smartwatches, fitness trackers, and other compact connected devices.